Authors:	Jan Pazdera
	Tomas Martinek

The TSU_COV design performs TSU_ADD handling by software. It makes available for software to request all three TSU modes (INIT, SHORT, FAST) and to read the actual time stamp value. Pictures not supported anymore.
TSU Cover Architecture

Subcomponents:

TSU ADD component
TSU_ADD component resides on add_on card provides transmition of time stamps (TS) from PTM card for the add on card design. There are three modes the TS can be transmitted by: INIT, SHORT and FAST mode. See below for more information.

TSU Cover Description

TSU Cover Component provides access to TSU_ADD component for software driver. Software driver can control TSU_ADD to obtain timestamp information by three different modes:

1. Init Timestamp (whole TS is sent)
2. Short Timestamp (last octet of TS is sent)
3. Fast Timestamp (last octet of TS is being sent continuously)

Software driver can activate these modes by INIT REQUEST or SHORT REQUEST. If neither INIT nor SHORT request is set the Fast Timestamp is active as default. As soon as timestamp information is received from PTM card, TSU_ADD generates acknowledge signal and "Ack register" is asserted. Software driver can read or clear this register. Ack register is NOT asserted during Fast Timestamp.

Operations controled by software

• INIT REQUEST
• SHORT REQUEST
• FAST REQUEST
• Read Time Stamp
• Read Ack register
• Clear Ack register

Implementation Notes

TSU_COV internal registers and logic are not synchronous with local bus clock. Therefore, LB_ASYNC component is used to transfer data between these clock domains.