Output Packet Editor

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Author:

Jan Pazdera

The Output Packet Editor(OPE) is a stream processor doing the packet header editation and transmition via TX-buffers. The Liberouter design contains 4 OPEs (one for each interface). Those editations take in for example Hop Limit decrementation, Routing Options changes, Encapsulation/Decapsulation (for L3 layer), or Source/Destination Addresses changes (for L2 layer). It recieves Replicator Records from Priority Queues component which comprises of Packet Parameters and data pointer into DRAM memory and Edit Parameters pointer into SSRAM memory. Pictures not supported anymore.
Basic OPE structure

Output Packet Editor (OPE) comprises of input stream, output stream, processor core, register field, data cache memory, instruction cache memory and various controllers. Data from input stream are read via ISD register which is mapped directly into the Register field. Data can be transmitted via output stream by writting into OSD register directly mapped into the register field. Please, see 'Instruction set' section for more informations.

Input Stream

Input stream is realized by several registers and frame memory. The frame memory is used to store a frame which contains a part of actual packet data (up to 2048 bytes). The frame is driven by four 16b registers (two of them are directly mapped in the register field; see 'Register Field Map' section) and one control register (mapped in Data Cache; see 'Data Cache Map' section):

ISB - Pointer to the frame beginning position
ISE - Pointer to the frame ending position
ISR(mapped in RF) - Actual read pointer
ISD(mapped in RF) - Contains data from position pointed by ISR
RD_MODE(mapped in DC) - turns on/off automatic ISE incrementation

Data in input stream are 8-byte aligned so the values in input stream registers refer to individual bytes. Input stream read pointer can be set to any position within the frame. ISE pointer can be shifted forward to trash the already processed data and make a space for next data. ISD register is also a trigger to increment ISR register by two (moves to next word = 2 bytes). It's triggered by simply reading the ISD value. Please see the 'Instruction set' section for more informations.

Output Stream

Output stream performs data transmition via TX-buffers. It is driven by one 16b data register and one cotrol register:

OSD(mapped in RF) - Data to transmit
OS_ODDTERM(mapped in DC) - disables higher half of OSD register for one writing (lower byte will be transmitted only)

OSD register is a trigger for data transmition. Each data word written to OSD register will be automaticaly transmitted. Please see the 'Instruction set' section for more informations.

Instruction set

Output Packet Editor (OPE) uses the GENA core with its instruction set (please see GENA documentation). OPE has also extension commands to control input and output streams. These commands can generate 3 kinds of interrupt in case of error (please see the 'Interrupts' section).

OPE Extension Commands (OEC)

Read ISD value, RD_MODE is cleared
Due to this operation the ISD register content is replaced by the next word from input (ISR register is incremented by 2).
Note: This command is performed by standart MOV or SW instruction of GENA core.
Example:

                ; read one word from input stream
                MOV %R00, %ISD

Read ISD value, RD_MODE is asserted
Due to this operation the ISD register content is replaced by the next word from input (ISR register is incremented by 2). The frame ending position is then shifted to the new actual position (ISE=ISR).
Note: This command is performed by standart MOV or SW instruction of GENA core.
Example:

                ; read one word from input stream
                MOV %R00, %ISD
                ; ISE = ISR

Write to OSD, OS_ODDTERM is cleared
A word stored into the OSD register is automaticly transmitted.
Note: This command is performed by standart MOV or LW instruction of GENA core.
Example:

                ; transmit 16 bits from R00 register
                MOV %OSD, %R00

Write to OSD, OS_ODDTERM is asserted
A lower byte of word stored into the OSD register is automaticly transmitted. Then the OS_ODDTERM is automaticly cleared.
Note: This command is performed by standart MOV or LW instruction of GENA core.
Example:

                ; transmit lower 8 bits from R00 register
                MOV %OSD, %R00

CMD_SET_ISR
This command changes the actual position to the one given by operand. It moves ISR to the specific address in the packet (forward and backward).
Note: This command is performed by storing operand value to the CMD_SET_ISR command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; move ISR to position 10
                MOVI    %R00, 10
                SW      %R00, CMD_SET_ISR
                ; ISR = 10

CMD_SET_ISRE
This command changes the actual position to the one given by operand. It moves ISR to the specific address in the packet (forward and backward). The frame ending position is then shifted to the new actual position (ISE=ISR).
Note: This command is performed by storing operand value to the CMD_SET_ISRE command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; move ISR to position 10
                MOVI    %R00, 10
                SW      %R00, CMD_SET_ISRE
                ; ISR = ISE = 10

CMD_SNDTOPOS_ISR
This command transmits data in a sequence from the actual position in the input stream until the given position is reached. In other words, the data are transimited until the incrementing ISR value is equal to the operand.
Note: This command is performed by storing operand value to the CMD_SNDTOPOS_ISR command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; transmit everything from actual position 
                ; to position 10 in input stream
                MOVI    %R00, 10
                SW      %R00, CMD_SNDNFWRD_ISR
                ; ISR = 10

CMD_SNDTOPOS_ISRE
This command transmits data in a sequence from the actual position in the input stream until the given position is reached. In other words, the data are transimited until the incrementing ISR value is equal to the operand. The frame ending position is then shifted to the new actual position (ISE=ISR).
Note: This command is performed by storing operand value to the CMD_SNDTOPOS_ISRE command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; transmit everything from actual position 
                ; to position 10 in input stream
                MOVI    %R00, 10
                SW      %R00, CMD_SNDNFWRD_ISR
                ; ISR = ISE = 10

CMD_SNDNFWRD_ISR
This command performs transmition of n bytes from actual position from the input stream. The number of bytes to send is given by operand.
Note: This command is performed by storing operand value to the CMD_SNDNFWRD_ISR command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; transmit 10 bytes from input stream
                MOVI    %R00, 10
                SW      %R00, CMD_SNDNFWRD_ISR

CMD_SNDNFWRD_ISRE
This command performs transmition of n bytes from actual position from the input stream. The number of bytes to send is given by operand. The frame ending position is then shifted to the new actual position (ISE=ISR).
Note: This command is performed by storing operand value to the CMD_SNDNFWRD_ISRE command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; transmit 10 bytes from input stream
                MOVI    %R00, 10
                SW      %R00, CMD_SNDNFWRD_ISRE

CMD_SNDREST_ISRE
This command performs transmition of the rest of the packet from the actual position in the input stream. The actual and frame ending position is then equal to the frame begining position (ISE=ISR=ISB).
Note: This command is performed by storing random operand value to the CMD_SNDREST_ISRE command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; transmit rest of packet
                SW      %R00, CMD_SNDREST_ISRE

CMD_NEXT_PCKT
Due to this command the actual packet transmition is finished and a next one is loaded into the input stream. The actual and frame ending position is then reset to zero (ISR=ISE=0). Packet parameters memory and Edit Parameters Memory are updated.
Note: This command is performed by storing random operand value to the CMD_NEXT_PCKT command register in Data Cache (see 'Data Cache Map' section').
Example:

                ; load new packet into the input stream
                SW      %R00, CMD_NEXT_PCKT

Interrupts

If an unhandlable error is occured then an corresponding interrupt is raised. There are three sources of interrupts:

When ISR moves to a position behind the physical size of the packet.
When ISR < ISE
When ISR moves to a posititon which can't be ever loaded due to a small frame size.

OPE nanoprogram restrictions

After an OEC is performed, ISD can't be read in next two instructions.
You can't write into OSD register if you then write to dc_os_cmd in next instruction.
ISD can't be read in case this instruction is followed by an OEC.
A OEC can't follow OEC immediately (in next instruction).

Register Field Map

Processor register field comprises up to 32 16-bits wide registers determined to different purposes.

R00-R27: General purpose registers
R28: ISD register (readonly) - this register contains one word of data from the input stream from position accordant with ISR register value. Reading this register performs incrementation of ISR value by 2. It can also perform incrementation of ISE register according to RD_MODE value (see 'Intruction set' section).
R29: ISR register (readonly) - this register holds actual position in input stream.
R30: OSD register (writeonly) - data written to this register are transmitted via the output stream. According to OS_ODDTERM register either the whole word or lower byte only is transmitted (see 'Instruction set' section).
R31: CSC data register - IPv4 checksum is computed from words stored into this register (not implemented yet).

Data Cache Map

Processor core Data Cache is used for several purposes. The first one is to have a memory to store a temporal data needed by nanoprogram. Second one is to have a readonly memory containing important data for/about the already processing packet. And the last one is to have a set of control and status registers to handle OPE, especially OEC (= OPE Extension Commands - see 'Instruction set' section).

Data cache address space description follows:

0x000-0x00F: Packet Parameters sector (readonly) - contains Packet Parameters of processing packet
0x010-0x01F: Edit Parameters sector (readonly) - contains corresponding Edit Parameters block
0x020-0x03F: RESERVED (readonly)
0x040-0x3FF: General Purpose memory (read/write) - free to use by nanoprogram
0x400: CMD_SET_ISR command register (writeonly) - OEC
0x401: CMD_SET_ISRE command register (writeonly) - OEC
0x402: CMD_SNDTOPOS_ISR command register (writeonly) - OEC
0x403: CMD_SNDTOPOS_ISRE command register (writeonly) - OEC
0x404: CMD_SNDNFWRD_ISR command register (writeonly) - OEC
0x405: CMD_SNDNFWRD_ISRE command register (writeonly) - OEC
0x406: CMD_SNDREST_ISRE command register (writeonly) - OEC
0x407: CMD_NEXT_PCKT command register (writeonly) - OEC
0x408: OS_ODDTERM register (writeonly) - Output Stream control register
0x409: RD_MODE register (read/write) - Input Stream control register

General Macros File

In units/ope/prog you can find a general.inc file containing useful macros.

Edit Parameteres

Edit Parameters are used to hold an additional information for packet editation process. They are structured into blocks (up to 128 bytes long) which are stored in Edit Parameters memory. Each processing packet is associated with certain EP block which is automaticly loaded from EP memory directly into the Edit Parameters sector in Data Cache (see Data Cache Map section).

Edit Parameters block structure description follows:

(EP block not specified yet)

Note:

This component specification is being created now. New featers and schemes comming soon:)