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Main page -> VHDL
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Authors: Jan Korenek
Jiri Tobola
Martin Kuzela


Look up processor (LUP) performs packet classification. LUP input is a structure called Unified Header which is created by Header field extractor and contain important informations from packet headers. Output is a record that controls packet processing in following blocks. LUP use TCAM and SSRAM memory. The Unified header classification starts in TCAM memory where part of Unified header is selected and matched. The TCAM result is address which points to the program stored in SSRAM memory. The program checks remaining part of unified header and is finished by EXE instruction which contain result (LUP) record.

Look up processor blocks

LUP consists of CAM block and four Processing units. Unified header processing starts in CAM block where part of Unified Header is selected and matched in TCAM memory. It's connected to all four input interfaces. After matching in CAM memory the remaining part of unified header is checked in processing unit. There is one processing unit for each input interface. Founded record is sent to the output interface together with packet identification.


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LUP block structure

CAM block

CAM block controls input buffers and fills CAM memory. Because of maximal usage of CAM memory, parts of unified header are loaded into the CAM buffers simultaneously with matching of previous UH. The result of matching is given to the processing unit as a starting address of PU program. CAM block also generates control signals for processing units and gives time slots for UH FIFO access.


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Cam block structure

The CAM block consists of Control Unit, CAM Buffer and four instances of FIFO Block and SADDR Control Block. See previous figure. FIFO blocks control Unified header fifo (UHF) and asure access to UHF for CAM block and Proscessing units. Data from UHF are distributed to PU and CAM Buffer. CAM buffer contain memory which is used to prepare data for matching in a TCAM. When data are matched, the result is send to SADDR Block. The SADDR Block contains FIFO memory for matched results and controls PU interface. The FIFO has 16 items and it balances the time differences between CAM block and PU block processing.

Processing unit

Processing unit (PU) - is a simple processor optimized for compare instructions. It performs program stored in synchronous static RAM. The result of matching in CAM serves as a starting address of program. Program check remaining part of Unified Header and finishes with EXE instruciton, which contain information about classification result (LUP record).

There are four PUs and they share one static memory in time slots generated by CAM block. Time slots also serve for multiplexing of result to output interfaces.

Processing of instructions is made in four steps: decode, mask, compare and ssram access. At first instruction is loaded into the instruction decoder where is decoded into the following , instruction is processed (compare instruction in mask block and compare unit, TAB instruction in next address block). New value of program counter is computed and next instruction is loaded from SSRAM. It continues untill EXE instruction is reached. Then matched record is sent to output and new unified header is processed.

For detailed description of PU phases see our CVS, file liberouter/vhdl_design/units/lup/comp/processing_unit/doc/instr_ph.txt


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Processing unit structure

Instructions set

CMP Compare register with constant
LTH Compare register with constant (less)
LTE Compare register with constant (less or equal)
GTH Compare register with constant (greater)
GTE Compare register with constant (greater or equal)
BLT Compare register with constant (low byte of register less)
BLE Compare register with constant (low byte of register less or equal)
BGT Compare register with constant (low byte of register greater)
BGE Compare register with constant (low byte of register greater or equal)
TAB4 Compute new program counter value
TAB8 Compute new program counter value
EXE Send record to replicator

Table 1:

For detailed description of PU instruction see our CVS, file liberouter/vhdl_design/units/lup/comp/processing_unit/doc/instr_set.txt

LUP Output

When Unified Header is classified, appropriate result is sent to the output. Valid signal is used to notify following block about new LUP result. The result consists of following information:

  • The most important information is matched LUP record. The record meaning is different in every project and contain action which is related to the packet class (drop packet, software processing, etc.).
  • LUP result also contain number of input interface where packet arrieved.
  • Packet identification is also included in LUP output.

Important Note : LUP doesn't work properly with Micron TCAM memory now!!!!!

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