| Info | HW section | SW section | Addr space | Interface | Versions |
| Authors: | Tomas Marek |
| Ludek Crha |
The Memory Scheduler unit stores packets and the Editing Parameters from the HFE units in the dynamic memory (DDR SDRAM), keeps reference counts for each packet (at its address in the memory), increments or decrements reference counts on Replicator or OPE demand, and reads a packet from the memory upon an OPE demand.
Another important MSH function is to provide an equal access of the HFE and OPE units to the shared memory and shared address resources. The MSH should give fair amount of time to the requesting unit. Equal access should prevent starvation of units waiting for the address allocation (HFE), data read or a references counter decrement (OPE) etc. and congestion of units waiting for data store (HFE).
Block structure of the MSH.
