| Info | HW section | SW section | Addr space |
Platform overview
The key components of NetCOPE project on Combo6x card are packet storage system and high performance bus system (Interconnection system) with high speed programmable Bus Master controller:
In NetCOPE platform there is need to connect many various components. We use we use unified data transfer protocol - FrameLink, which is a subset of well known LocalLink protocol from Xilinx. FrameLink also provides needed abstraction for data transfers from Input Buffers or Aurora connection from interface card. We have prepared a set of FrameLink tools for FrameLink protocol stream manipulation, which should speedup any application development.
The platform further offers a set of IP cores usable as basic building blocks for a wide range of network applications, including cores for packet analysis, classification, packet modification, precise timestamps, pattern matching, statistics etc. The examples of developed cores:
- GENA - processor core dedicated for packet processing
- Header Field Extractor - packet parsing
- Look-up processor - packet classification
- Output packet editor - packet editing
- Precise timestamps generation
- more examples
- Template component - for internal usage
Architecture
Interface card
As Combo6x card doesn't contain network interfaces, we have prepared several Interface cards with different types and numbers of network interfaces. These cards are also controlled via FPGA and we have prepared NetCOPE hardware layer for following cards:
- COMBO-4SFPRO - 4x 1G Ethernet with XC2VP20 FPGA add-on card. See card details for additional information.
- COMBO-2XFP2 - 2x 10G Ethernet + 1x 1G Ethernet with XC2VP30 FPGA add-on card. See card details for additional information.
The overview of the Combo6x architecture is on the following figure.
NetCOPE architecture on Combo6x with connected Interface card
Device utilization
| Slices | BlockRams | |
|---|---|---|
| COMBO6X (xc2vp50) | 6570 (27.8%) | 62(26.7%) |
Table 1:Chip utilization
