Cesnet Liberouter
  • Projects
  • Liberouter
  • Scampi
  • FlowMon
  • NIC
  • NIFIC
  • IDS
  • NetCOPE
  • VHDL design
  • System software
  • Testing
  • Formal verification
  • Netopeer
  • Documents
  • Our hardware
  • Card Availability
  • Our partners
Main page -> VHDL
Flexible FlowMon
InfoHW sectionSW sectionAddr space

Design initialization

  1. Initialize Hash Generator unit
  2. Initialize Flow state manager unit
  3. Initialize all Flow processing units(number of FPUs will be defined in appropriate design.xml file).
  4. Enable required Input buffers



Main Page About Liberouter Team Mailing list SVN Contacts