Date: 3rd and 4th September, 2009
Location: Brno University of Technology, Laboratory Room L314
Online Registration (max. 20 participants)
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware- accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Protocol (IP) routers using hardware rather than software and can be used by researchers to prototype advanced services for next-generation networks.
By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.
The NetFPGA enables to implement highly accurate network monitoring devices. During the tutorial, we will demonstrate how to use NetFPGA for wire-speed monitoring based on CISCO NetFlow technology, which is widely used for accounting, billing, network capacity planning or intrusion detections. An example of FPGA based industrial solution for NetFlow monitoring will be shown on family of COMBO cards.
This two-days hands-on tutorial will be held in a laboratory equipped with ten PCs with NetFPGA hardware.
Program
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Thursday 3rd September, 2009
09:00 - 10:30 Session I
Introduction, background, Stanford Reference Router 10:30 Coffee Break
11:00 - 12:30 Session II
Research with the NetFPGA, Enhanced Reference Router 12:30 Lunch
13:45 - 15:15 Session III
Life of a Packet, Datapath, Extending the Router - an example 15:15 Coffee Break
15:45 - 17:00 Session IV
Further hardware platforms, NetFPGA in research and teaching, group discussion |
Friday 4th September, 2009
09:00 - 10:30 Session V
Introducing Module development in the NetFPGA, Implement an example module 10:30 Coffee Break
11:00 - 12:30 Session VI
Implement verification test (for use against the ModelSim simulator) 12:30 Lunch
13:45 - 15:15 Session VII
High speed networks monitoring NetFlow and IPFIX measurement 15:15 Coffee Break
15:45 - 17:00 Final Session
Feedback, Final thoughts |
Location
The location is Brno University of Technology, Faculty of Information technology. It is located at the tram station "Semilasso", see the map:
Brno University of technology
Faculty of Information Technology
Room L314
Božetěchova 2,
612 66 Brno,
Czech Republic
Accomodation
Lidická 23,
659 89 Brno
Distance: 8 minutes by tram 1, 6 or 7
To reserve this hotel at the special rate, use code 'FPL2009'.
Room reservations cannot be guaranteed after July 31, 2009.
The workshop attendees can use special coach from the FPL 2009 conference hotel to hotel Slovan on Wednesday afternoon and special coach from hotel Slovan to Prague on Friday evening.
Photos
Slides
day 1
day 2
day 2 - NetFlow
day 2 - Invea-Tech
Video
Session I
Session II
Session III
Session IV
Session V
Session VI
Session VII
Final session
NetFlow on NetFPGA
Managed by
The NetFPGA tutorial will be held at the Faculty of Information Technology, Brno University of Technology and managed by:
Stanford University and the NetFPGA project
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